Position : Lead Design Engineer – DFT
- Leading DFT implementation, integration and verification of System-on-Chip (SoC) from initial specification till tapeout and production.
- Addressing test quality targets in DFT architecture and test pattern generation.
- Leading various aspects of Test architecture including ScanATPG, Memory BIST, Logic BIST, Analog/PHY test and post-silicon support
- Work with different functions like front-end design, verification and physical design to ensure production quality silicon.
- Support post-silicon activities, working with test engineering and validation teams.
Specific Knowledge/Skills :
- Master/Bachelors Degree in Electrical/Electronic Engineering.
- Experience 4 Years in DFT with successful delivery of production quality ASICs.
- Senior SoC DFT engineers, with experiences in all aspects of DFT, including scan ATPG, memory BIST, logic BIST, analog test, and post-silicon support.
- Good understanding of design flow from specification / micro-architecture definition to design and verification, timing analysis, and physical design.
- Self-motivated. Excellent written and verbal communication skill.
- Creative problem-solving skills, logic analysis skills, ability to logically break complex problems down to manageable components.
- Should be a team player and willing to work with cross functional teams in issues resolution.
Desired Skills and Experience :
catia v5, autocad, drawing, welding, bom, front end, logic bist, design flow, physical design, problem solving, timing analysis, test engineering, frontend design, verbal communication, connectivity solutions, dft, soc, iot, nxp, atpg
- Computer Hardware
- Computer Software
- Information Technology