Verification of the microarchitecture using industry standard Formal Verification tools and technologies based on latest model checking and equivalence checking algorithms on world class design IPs (Graphics, Server IPs, processors and SOCs) . Using the hardware architecture design and RTL implementation details, define the Formal Verification scope, deploy the right strategy to prove the correctness while deploying advanced formal techniques, and create abstraction models for convergence on the design, Carve out the right boundaries for the design, create comprehensive Formal Verification test plans, track, verify, apply abstraction techniques and converge on complex designs to deliver a high quality design on schedule and articulate the ROI. Analyses new methodologies, evaluates new tools and corroborate results. May work with vendors on resolving hard design and tool problems.
Engineers should possess a Masters degree in Computer Science Electrical Engineering Mathematics Specialization in formal verification is preferableDesignVal engineers who want to try the new paradigm in verification are welcome to apply Formal Verification being a sought after capability can help the engineer get a fresh perspective on proving a designInside this Business Group
In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations. DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams. As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.